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Sr. Project Engineer - FPGA
Job Opportunity at
Joseph Michaels International
Posted on May 9
Sr. Project Engineer - FPGA
The Sr. Project Engineer - FPGA is responsible for Electrical Engineering FPGA development in support of product teams developing and improving electronic products. The ideal candidate will have a strong background in
, with working experience in the creation, simulation, validation, and integration of programmable logic into a targeted FPGA embedded in a broad range of systems and interfaces.
Engage in all phases of product development, including concept, architecture, design, and test.
Carry out programmable logic development, timing closure, verification, board level integration and validation.
Participate in interdisciplinary design teams and reviews such as peer reviews, code reviews, and other technical exchanges.
Interface with HW/SW engineers to test and verify electrical interfaces and protocols between the FPGA and embedded system devices.
Perform detailed technical analyses, and create test and analysis reports.
Modify and improve existing FPGA designs in VHDL, Simulink, and HDL Coder design flows.
Perform design support tasks including:
Generation of specific flow-down specifications from system level requirements
Development of test plans and procedures for FPGA integration
Creation of all relevant design description documentation and comment records to ensure the delivery of a quality finished product
Follow established company processes for product development and configuration management.
Provide guidance to improve processes and ensure consistency with industry best practices.
Mentor other Engineers and Technicians.
Other duties as assigned
Bachelor of Science degree in Electrical Engineering
Minimum of 7 years of FPGA code development experience
Ability to travel 10%
Thorough knowledge of
products and development environments, including experience with the
Xilinx Vivado Design
Suite and exposure to legacy ISE tools.
VHDL code development
, simulation, verification, constraints, and methods to reach timing closure.
Capable of simulation test benching within the
environment to produce bit-accurate results.
Expertise in laboratory debug techniques, including proficiency with oscilloscopes, logic analyzers, spectrum analyzers, signal generators, and related equipment.
Understanding of fundamental
and implementation methods, particularly software defined radios.
Design experience with standard interfaces and protocols (e.g., SPI, Flash, and SDRAM)
Fundamental understanding of digital board level electrical interfaces, including
ADCs, DACs, Flash and SDRAM.
Able to examine, understand, and modify existing
in order to adapt functioning code to new requirements with minimal perturbation.
Strong technical background with a desire to learn new technologies.
Solid track record of planning, scheduling, and on-time execution of designs.
Proactive problem solver with great attention to detail.
Excellent communication skills (written, verbal, & presentation.)
Excellent people skills to include collaborating in a multi-disciplinary, diverse, and dynamic team environment to debug and solve system level problems.
Outstanding work ethic and commitment to organizational success.
Proficient with Microsoft Office products.
Design experience with Xilinx/third party IP interfaces (e.g., DDR2, Ethernet MAC)
Knowledge of Microsemi SmartFusion and/or IGLOO2 FPGA’s and design tools, including Libero SOC
Experience with Xilinx Zynq/Altera SoC ARM-based devices
Experience with Synopsys Design Constraints
Experience with MATLAB
Familiarity with C/C++, Python, and LabVIEW
Duluth, Georgia or Tallassee, Alabama
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